Vol. 2, No. 1, 2014
Contents
- Cover Page
- Inside Cover Page
- Editorial Board
- Foreword and Editorial
- Table of Contents
- Copyright
- Implementation of Low Power Digital Clock Design Using Capacitance Scaling of FPGA
by: Shubham Gargrish, Harsimran Kaur and Payal Tanwar
DOI: http://dx.doi.org/10.21742/ijuduc.2014.2.1.01 - Community Detection Using Differential Evolution Algorithm with Multiple Objective Function
by: Harish Kumar Shakya, Kuldeep Singh and Bhaskar Biswas
DOI: http://dx.doi.org/10.21742/ijuduc.2014.2.1.02